
15
AT89C51ID2
4289C–8051–11/05
Table 17. OSCCON Register (for AT8xC51Ix2 only)
OSCCON- Oscillator Control Register (86h)
Reset Value = XXXX X0’HSB.OSC’’HSB.OSC’b (see Hardware Security Byte (HSB))
Not bit addressable
Table 18. CKRL Register
CKRL - Clock Reload Register
Reset Value = 1111 1111b
Not bit addressable
76
543
210
-
SCLKT0
OscBEn
OscAEn
Bit
Number
Bit
Mnemonic
Description
7-
Reserved
6-
Reserved
5-
Reserved
4-
Reserved
3-
Reserved
2SCLKT0
Sub Clock Timer0
Cleared by software to select T0 pin
Set by software to select T0 Sub Clock
Cleared by hardware after a Power Up
1
OscBEn
OscB enable bit
Set by software to run OscB
Cleared by software to stop OscB
Programmed by hardware after a Power-up regarding HSB.OSC (Default
cleared, OSCB stopped)
0
OscAEn
OscA enable bit
Set by software to run OscA
Cleared by software to stop OscA
Programmed by hardware after a Power-up regarding HSB.OSC(Default Set,
OSCA runs)
76
543
210
--
----
--
Bit
Number
Mnemonic
Description
7:0
CKRL
Clock Reload Register:
Prescaler value